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- Adevs (A Discrete EVent System simulator)
A C++ library for constructing discrete event simulations based on the Parallel DEVS and Dynamic DEVS (dynDEVS) formalisms. - C++SIM
An object-oriented simulation package written in C++. It provides discrete event process-based simulation similar to SIMULA's simulation class and libraries. - libLCS
A library for Logic Circuit Simulation developed in 100% c++. The ultimate aim of LCS is to become a thorough hardware description library, matching the functionality of the Verilog hardware description language, while keeping the usage (and syntax) as intuitive as possible. - SID
A framework for building computer system simulations. Specifically, a simulation is comprised of a collection of loosely coupled components. Simulated systems may range from a CPU's instruction set to a large multi-processor embedded system. [Open source, GPL with changes]. - SimSys
A programming framework for simulating digital logic. [Open Source] - WARPED
A Time Warp simulation kernel written in C++. [Public Domain]
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